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Sipeed M1n Module AI Development Kit based on K210 (RISC-V)

SKU
102991335

3d彩涂3d彩涂this m1n ai module development kit is designed by sipeed. the kit includes an m1n module, a type-c to m.2(not standard m.2 interface)adapter, and a camera. the m1n module embeds the k210 ai chip which has a powerful cpu, npu, and apu. you can use the maixpy ide, arduino ide, and platformio ide for software development. 

$9.90
In stock
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Key Features

  • Multiple Functions: Face detection, Object recognition, FFT spectrogram, and Game simulator.etc
  • CPU: RISC-V 64 bit dual-core processor, 400 MHz standard frequency(overclockable)
  • Image recognition: QVGA@60FPS/VGA@30FPS
  • Voice recognition: Supports arrays of up to 8 microphones
  • Deep learning framework: Tensorflow/Keras/Darknet
  • Peripherals: FPIOA, UART, GPIO, SPI, I2C, I2S, WDT, TIMER, RTC, etc

Description

3d彩涂3d彩涂this m1n ai module development kit is designed by sipeed. the kit includes an m1n module, a type-c to m.2(not standard m.2 interface) adapter, and a camera. the m1n module embeds the k210 ai chip which has a powerful cpu, npu, and apu. the cpu of k210 is based on risc-v framework and can reach up to 400 mhz frequency. for the npu, its tops parameter is significant to the ai performance of the chip. k210 has the ability to reach 1 tops which means the little module has a good ability to realize the application such as face detection, object recognition, and fft spectrogram.

3d彩涂3d彩涂the m1n module has an m.2 interface to connect the type-c downing board. the downing board has the usb to uart function to provide users multiple ways of downloading the code to the module. the downloading board also has 2.54mm pins for more diy functions adding by users. these pins on the downloading board are directly connected to the pins from the k210 chip. besides, there is a camera as well to get the images or videos.

3d彩涂3d彩涂sipeed has developed its own ide maixpy for ai processing. you can also use the arduino ide and platformio ide for software development. 

Specification

CPU: RISC-V dual-core 64bit, 400MHz adjustable frequency:Powerful dual-core 64-bit open architecture-based processor with rich community resources
FPU specification Meet the IEEE754-2008 standard
Debugging support High-speed UART and JTAG interface for debugging(only wire bond pads are available)
Onboard camera DVP carrier 224pin 0.5mm pitch FPC carrier, AVDD-3.0V; DVDD-1.3
Pinout In addition to the 4 IOs of the JTAG interface, the rest of the IO is exported to the M.2 interface.
Neural-Network Processor Unit(NPU)
  • Support for the fixed-point model trained by the mainstream training framework in accordance with specific restriction rules
  • There is no direct limit on the number of network layers, which supports separate configuration of each layer of convolutional neural network parameters, including the number of input and output channels, input and output line width and column height.
  • Support for two convolution kernels 1x1 and 3x3
  • Support for any form of an activation function
  • Maximum support for neural network parameters in real-time operation from 5.5MiB to 5.9MiB
  • Maximum supported network parameter size when working in non-real time(Flash capacity - software volume)
Audio processor(APU)
  • Can support up to 8 audio input streams, ie 4 channels of dual-channel
  • Can support simultaneous sound source pre-processing and beamforming in up to 16 directions
  • Can support a valid voice stream output
  • Internal audio signal processing accuracy reaches 16-bit
  • Input audio signal supports 12-bit, 16-bit, 24-bit, 32-bit precision
  • Support multi-channel raw signal direct output
  • Can support audio input up to 192K sample rate
  • Built-in FFT transform unit to provide 512-point fast Fourier transform for audio data
  • Store output data into SoC's system memory using system DMAC
Static Random Access Memory(SARM) The SARM consists of two parts, 6MiB of on-chip general pur[ose SARM memory and 2MiB of on-chip AI SRAM memory, for a total of 8MiB(1Mib is megabyte).
Field-Programmable IO Array(FPIOA/IOMUX) FIA allows users to map 255 internal functions to 48 free IOs on the periphery of the chip
Digital Video Interface Maximum support 640x480 and below resolution, configurable per frame size
Fast Fourier transform accelerator The FFT accelerator implements FFT operations in hardware.
FreeRtos & Standard SDK Support FreeRtos and Standard development kit
MicroPython Support Support MicroPython on M1
Machine vision Machine vision based on convolutional neural network
Machine hearing The high-performance microphone array processor
External supply voltage requirement 5.0V±0.2V
External supply current demand > 300mA @ 5V
Temperature rise < 30K
Range of working temperature -30 °C ~ 85 °C

Part List

  • 1x Sipeed AI M1n core module(M.2)
  • 1x Type-C to M.2 adapter(M.2)
  • 1x OV0328 camera
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HSCODE 8543709990
UPC
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